ineganov/sdram_controller
A simplistic SDRAM-controller
Discovered public repositories for ineganov in the GitHub catalog.
A simplistic SDRAM-controller
Enhanced 5-stage CPU core with several HW implementations
7-stage CPU core with MMU and Exceptions
a simple testbench
Floating point multiplication
Floating point addition/subtraction. No denormals and NaN propagate.
Public repository.
Bare MCPU system for DE0-Nano
Public repository.