gauravtewari/vhdl-designs
Practice files for VHDL Digital Design
Public GitHub Catalog
Discovered Sep 26, 2026
gauravtewari / sta
Static Timing Analysis Assignment for EE5301 Proj 1b
About this discovery
Public repository record indexed from GitHub. Explore verified star velocity metrics, source code repositories, and curated developer tool directories across the GitHubRepo ecosystem.
#6730393GitHub System ID
gauravtewariOrganization / User
PublicVisibility
ActiveCatalog Status
More from gauravtewari
gauravtewari/python-to-verilog
Generate a Verilog Source file and testbench file for a given Moore FSM
gauravtewari/netlist
To build data structures for netlist description and to calculate fan outs and fan ins