russdill/bch_verilog
Verilog based BCH encoder/decoder
Developer Profile
russdill
Discovered public repositories for russdill in the GitHub catalog.
russdill/jvpn
Perl script to connect to the Juniper VPN with Host Checker enabled
russdill/ncsvc-socks-wrapper
wrapper for socksification of Juniper VPN
russdill/lwip
A Lightweight TCP/IP stack
russdill/libsigrok
Public repository.
russdill/pmc-17
17 channel power monitoring card
russdill/am33x-cm3
Public repository.
russdill/tick
Beaglebone Black development board
russdill/esb
Public repository.
russdill/pnp
pick and place helper
russdill/mite
mite debug dongle
russdill/u-boot
Das U-Boot -- the Universal Boot Loader
russdill/set64rs
Utilities for the SET64 rs style PID
russdill/pscad
OpenSCAD-like PCB footprint generator
russdill/pcbcons
Constraint based PCB footprint creation
russdill/linux
Linux kernel source tree
russdill/pcb
Printed circuit board layout
russdill/autotest
Autotest - Fully automated tests on Linux
russdill/dtr
DTR power control
russdill/ttypersist
TTY Persist is an LD_PRELOAD library that hides the disconnection of serial devices.
russdill/darter
SPICE based IBIS simulation
russdill/pybis
Python based IBIS parser