tao-j/Duo-RISC
Switch ISA like a pro: RISC-V + MIPS in a single core
Water quenched Fire, and .. produced the Melonくん
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Switch ISA like a pro: RISC-V + MIPS in a single core
A MIPS assemble code to machine code toolkit. Originated by @Wenri
A simple MIPS SoC implemented on Digilent Nexys3 board
Public repository.