swinman/pyusb-terminal
Terminal emulator for pyusb devices
branch of exuberant-ctags
This repository is cataloged as part of our automated global GitHub synchronization. Full telemetry, velocity snapshots, and code summaries are scheduled for continuous enrichment.
Terminal emulator for pyusb devices
uart vhdl code
A VHDL UART for communicating over a serial link with an FPGA
A library of synthesisable VHDL components, including arithmetic, division, Memory, FIFO, UART, and Ethernet cores.