# skalldri/mips-verilog

> This is a simplified MIPS processor that I built with Arthur Kam for a course at the University of Waterloo

- **Canonical URL**: https://githubrepo.cloud/repo/skalldri/mips-verilog
- **GitHub Repository**: https://github.com/skalldri/mips-verilog
- **Maintainer / Creator**: https://github.com/skalldri
- **Discovered On**: Oct 21, 2026

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