k-langer/HardwareMultipler
Hardware multipler for other projects with a testbench. Both in Verilog.
Implementing a TCP clone over UDP for reliable send and receive over an unreliable network
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Hardware multipler for other projects with a testbench. Both in Verilog.
Stanford Intmm inner loop port'ed to x86-64 ASM (to learn inline asm)
Profiling indirect branch targets
Generate traces from regular ol' binaries; Execute with my very own trace based simulator