# jkunkee/asmd-gen

> Takes in an ASMD (hardware RTL state machine design) description and outputs Verilog or VHDL. Like QFSM, only simpler.

- **Canonical URL**: https://githubrepo.cloud/repo/jkunkee/asmd-gen
- **GitHub Repository**: https://github.com/jkunkee/asmd-gen
- **Maintainer / Creator**: https://github.com/jkunkee
- **Discovered On**: Oct 21, 2026

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