furufuru2013/verilog-sha256
Implementation of the SHA256 Algorithm in Verilog
Bitcoin Core integration/staging tree
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Implementation of the SHA256 Algorithm in Verilog
A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.
Automatic Number Plate Recognition Using OpenCV (SVM and Neural Network)
Public repository.