# funningboy/MyHDL-based-FPGA-DSP-Toolflow

> A library for generating Software Defined Radio-intended DSP code for FPGAs that makes use of the MyHDL (www.myhdl.org) Python library. Targeted at the Rhino Project (see URL).

- **Canonical URL**: https://githubrepo.cloud/repo/funningboy/MyHDL-based-FPGA-DSP-Toolflow
- **GitHub Repository**: https://github.com/funningboy/MyHDL-based-FPGA-DSP-Toolflow
- **Maintainer / Creator**: https://github.com/funningboy
- **Discovered On**: Sep 27, 2026

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