fpgadeveloper/ethernet-fmc-axi-eth
Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
Project created with the Base System Builder for the ZC706
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Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
Example design for the Ethernet FMC on the MicroZed
Example design for the Ethernet FMC using an FPGA based hardware packet generator/checker to demonstrate maximum throughput
Loopback design for the Ethernet FMC on the ZedBoard using 4 AXI Ethernet blocks