dawsonjon/fpu
synthesiseable ieee 754 floating point library in verilog
AVR based GPS speedometer with retro LED display
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synthesiseable ieee 754 floating point library in verilog
Chips 2.0 Demo for Atlys Spartan 6 development platform. Web app using C to Verilog TCP/IP server.
A reStructuredText Editor
FPGA Design Suite based on C to Verilog design flow.