YosysHQ/icestorm
Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)
A Verilog Synthesis Regression Test
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Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)
PicoRV32 - A Size-Optimized RISC-V CPU
Place and route tool for FPGAs
Yosys Plugins