WalterTao/HybridSim
Simulator of a memory controller to connect DRAMSim and FlashDIMMSim into one unified memory
Course Project
This repository is cataloged as part of our automated global GitHub synchronization. Full telemetry, velocity snapshots, and code summaries are scheduled for continuous enrichment.
Simulator of a memory controller to connect DRAMSim and FlashDIMMSim into one unified memory