Assembler for the processor of the Digital Systems Laboratory Course
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This is the second and third part of the Digital System Laboratory coded in Verilog. It contains a single cycle modified Harvard processor that interfaces with multiple peripherals accessed via memory mapped I/O. Peripherals include a PS2 mouse port, a VGA port, and an IR controller. Besides the skeleton code that was provided to us, the collaborators on this are: Vincent Steil Finn Tessier-lavigne Mihail Dimitrov Mitev
PS2 Controller in Verilog as part of my Digital System Laboratory Class. Most of the code was provided, debugging was a nightmare (that moment when you're frantically hunting an erratic bug when it's not your code that's wrong, it's the provided code that's missing a stop bit...)
This is a simulator for my distributed systems class that reads in formatted text data and implements lamport clocks and a mutual exclusion algrithm.
Extreme Computing assignment for hadoop