# TestudoAquatilis/blif-FSM

> Converter from blif-FSM-file to verilog/vhdl/memfile

- **Canonical URL**: https://githubrepo.cloud/repo/TestudoAquatilis/blif-FSM
- **GitHub Repository**: https://github.com/TestudoAquatilis/blif-FSM
- **Maintainer / Creator**: https://github.com/TestudoAquatilis
- **Discovered On**: Sep 25, 2026

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