# KorotkiyEugene/LAG_sv_syn_quartus

> Network-on-Chip (NoC) with Link Aggregation (LAG), modified for synthesis in Quartus II. Repo contains LAG.tcl that creates and configures Quartus II project of the NoC with LAG. In addition, gate level model of the NoC with LAG can be created and than simulated in ModelSim.

- **Canonical URL**: https://githubrepo.cloud/repo/KorotkiyEugene/LAG_sv_syn_quartus
- **GitHub Repository**: https://github.com/KorotkiyEugene/LAG_sv_syn_quartus
- **Maintainer / Creator**: https://github.com/KorotkiyEugene
- **Discovered On**: Sep 29, 2026

---
*Indexed by GitHubRepo (https://githubrepo.cloud). Real-time open-source discovery & telemetry.*