skristiansson/minimig-de1
Minimig for the DE1 board
Discovered public repositories for skristiansson in the GitHub catalog.
Minimig for the DE1 board
Online OR1K Emulator running Linux
LK embedded kernel
"Das U-Boot" Source Tree
Linux kernel source tree
ScummVM main repository
linux kernel headers (sanitized for use with musl)
Wishbone component for converting data streams to wishbone transactions
Redirects stdin to stdout while grabbing mouse/keyboard input
A high-speed network processing platform powered by OpenRISC
A small suite of scripts and patches for building musl libc cross compilers.
Debian port for or1k
work-in-progress musl libc port for the OpenRISC 1000 architecture
The OpenRISC 1000 architectural simulator
Public repository.
Pipelined version of the eco32 CPU architecture implemented in verilog
Functional simulator for eco32, from http://opencores.org/project,eco32
uClibc for eco32
Linux port for the ECO32 architecture.
Newlib with eco32 support. "Fork" from https://codeinbarrels.net/jens/egg/src/egg-0.0.5.tar.bz2
gcc backend for eco32. "Forked" from https://codeinbarrels.net/jens/egg/src/egg-0.0.5.tar.bz2 and updated to gcc 4.8.1
binutils for eco32, "forked" from https://codeinbarrels.net/jens/egg/ and updated upon binutils-2.24
i2s core, with support for both transmit and receive
Subtractive synthesizer core
Core description files for ORPSoCv3
SDRAM controller with multiple wishbone slave ports
Public repository.
Fork of the Milkymist-NG system-on-chip with support for mor1kx
A Device Independent Integrated Logic Analyzer
Dump repo for mor1kx WIP (Do not use if not explicitly told so, use openrisc/mor1kx)
Development and verification environment for the mor1kx core
Public repository.
uClibc for OpenRISC 1000
OpenRISC 1000 port for sourceware.org's src tree (binutils, gdb, newlib, etc.)
"compiler-rt" Runtime Library with OpenRISC 1000 support
Clang for OpenRISC 1000
LLVM backend for OpenRISC 1000