ikwzm/cmabuf
Linux device driver for dma buffer using dma_alloc_coherent()
Developer Profile
ikwzm
Discovered public repositories for ikwzm in the GitHub catalog.
ikwzm/MMU_AXI
MMU(Memory Management Unit) and ATS(Address Translation Service) for AXI Master to Host Memory.
ikwzm/xilinx_axi_interconnect_test_2
Xilinx AXI Interconnect Test Project(2)
ikwzm/ZYBO_PUMP
ZYBO Sample Project with PUMP_AXI4 and LED_AXI
ikwzm/LED_AXI
LED Controller with AXI Slave I/F
ikwzm/axi_slave_bfm_test
TestBench for axi_slave_BFM
ikwzm/vivado_sim_crash_sample_1
Xilinx Vivado Simulator Crash Sample 1
ikwzm/xilinx_axi_interconnect_test
Xilinx AXI Interconnect Test Project
ikwzm/Generic_Priority_Encoder
Generic Priority Encoder written in VHDL(RTL) for FPGA.
ikwzm/PUMP_AXI4
Simple AXI4 Master Read and Write DMA module. Use PipeWork Components.
ikwzm/PipeWork
Pipework components is VHDL library for NoC(Network on Chip).
ikwzm/FIFO_with_done
FIFO with done VHDL RTL Model (PipeWork example)
ikwzm/SECURE_HASH
SHA-1,SHA-256,SHA-512 Secure Hash Generator written in VHDL(RTL) for FPGA(Xilinx and Altera).
ikwzm/MT32_Rand_Gen
Mersenne Twister Pseudo Random Number Generator written in VHDL(RTL) for FPGA(Xilinx and Altera).
ikwzm/PipeWorkTest
Pipework components is VHDL library for NoC(Network on Chip).
ikwzm/Dummy_Plug
Dummy Plug is a simple bus functional model library written by VHDL only.